Villanova
University
Department of Electrical and
Computer Engineering
ECE 3971
Title: MP3 Project
Team Members:
Brian Allen
Zeeshan Khan
Jerry Koshy
Advisor:
James Peyton-Jones
Background
The goal of our senior design project is to design and construct an MP3
Player. An MP3 player is an electronic
device that can decode and play MP3 files.
The MP3 format is a compression system for music. The number of bytes of a sound file is
reduced without decreasing the quality of the file. The goal of the MP3 format is to compress a CD-quality song by a
factor of 10 to 14 without losing the CD-quality sound. With an MP3, a 32-megabyte (MB) song on a CD
condenses down to about 3 MB. MP3 is the short form for MPEG Audio Layer
3. MPEG refers to the Moving Pictures
Experts Group, an organization that sets international standards for digital
formats for audio and video. The Fraunhofer Institute in Germany developed the
file-shrinking technology.[1] An MP3 player is a device that can store,
decode and play these music files. An
MP3 works by pulling a song from memory byte by byte, then the file is
decoded. Next the decompressed bytes
are sent through a digital-to-analog converter. Finally, the analog signal is amplified and sent to speakers or
headphones.
(Refer to Appendix
A, Figure 1 for a basic step-by-step process.)
Our group was motivated to work on this MP3 project because we wanted
to combine all aspects of our software and hardware knowledge. Our design team consists of three
computer-engineering majors and we decided as a group to develop an MP3
player. We plan to use our knowledge of
the basic principles of digital signal processing and computer architecture to
design the device.
Objectives
The purpose of our project is to design and
physically create a portable MP3 player.
The device utilizes a memory device for storing MP3 files. A computer will have the capability of
interfacing to the memory device, so that files can be added, deleted, or
rearranged. The decoder will take an MP3
file and convert it to an analog signal with the use of a digital-to-analog
converter. After the file is converted,
the signal will be amplified through an amplifier so that the sound can be
heard with the use of speakers or headphones.
There will be a user-interface to allow the user to switch songs, start
and stop playback, and adjust the volume.
An LCD will display song information for the user. The microprocessor will have the
responsibility of coordinating all activities within the MP3 player. All devices will send and receive
information from the processor.
(Refer to Appendix A, Figure 2 for a block
diagram of the parts.)
This project
permits Computer Engineers to design both the hardware and software aspects of
making a device for playing MP3’s. An
initial schematic of the project must be constructed. The schematic requires the knowledge of circuit design and
theory. Since the MP3 player works with
discrete data and must convert to the real-world analog signal, an
understanding of digital and analog systems is necessary. In order to permit the devices in the system
to communicate with each other, low-level programming is required. Also, software will allow the user to
interface with the MP3 player. All of
the designs will be tested on hardware simulation applications. After developing a successful
computer-simulated prototype, we want the product to be implemented on a
printed circuit board.
Specifications / Constraints
We researched various types of MP3
players before selecting the one appropriate for our design. The three
categories are stand-alone, portable, and pc-based. The stand-alone MP3
player does not connect to a PC or its components, instead, it is built using
other electronic parts such as a MP3 decoder, microprocessor, RAM, ROM, LCD
display, power supply, and an operating system. The MP3 data is typically
stored on a build-in hard drive or CD ROM interface. The portable player is similar to the stand-alone, except the
power supply source is typically batteries.
Also, the portable player is more compact and the memory source is
lightweight. The final category is the PC-based player. This uses
the computer for processing and decoding while the source of files is the
computer hard drive.
After examining the three categories
of players, we decided to design a portable system. The portable MP3 player provides mobility to a certain extent and
it would allow for easy transport of the device for demonstration. One
consideration that had to be taken was that this player is usually more
expensive to construct and there is more complexity involved in scaling down
the components.[2] Another factor taken in account was storage
capacity. The storage device for the portable device is usually more
expensive than the stand-alone device.
The drawbacks of the PC-based MP3 player include larger size, more
expense for the actual PC, and lack of transportability. The problem with stand-alone players is the
difficulty to interface the hard disk or CD-ROM with the processor. Therefore, we decided to choose the portable
MP3 player.
We performed extensive research on
the components needed for the player. Different processors, decoders, and
memory devices were analyzed. We looked at cost, reliability,
feasibility, and dependability of the components. The different microprocessors
that have been utilized for this type of hardware are PIC16C65, TMS320C31DSP, Hitachi
2357F, PIC16F877, Motorola 68V328, and
others chips. A few decoders used are
MAS3507D, VS1001K, and the TI DSP C5402. Finally, the source of the MP3’s
can be the parallel port, CD-ROM, Hard Drive, SanDisk Multimedia Card, or
Compact Flash.
We performed additional research on
specific parts for our project. More specifically, we looked at several
processors that can be used as the microcontroller for our MP3 player. The first chip that was focused on is the
PIC16F84. Some of the notable
characteristics of this processor are the size, which includes its reduced
instruction set of 35 and 18 pin design.
Another chip from the PIC family is the PIC16F877. It provides more I/O ports and includes 44
pins. The next chip that we took note
is the Atmel AT90S8515 Chips. This
family of Atmel chips is powerful and provides a highly flexible and cost
effective solution to many embedded control applications. The Motorola MC68HC11, which is more complex
than the PIC, was taken into consideration.
The Motorola contains powerful bit-manipulation instructions and power
saving stop and wait modes.
We began to decide on specific
design requirements for our MP3 player.
Looking at mounting technology, we had to choose a board. The Printed Circuit Board (PCB) will be used
since we can easily add chips and solder components to the board. For the mounting characteristic of our
chips, the Dual Inline Package (DIP) was the right choice. Most of the components that we have been
researching come in the DIP format.
These components will be easier to obtain and easier to place on our
board. We decided to use DIP and
surface mount chips on a PCB board. We
must make sure that all of the components that we purchase are compatible with
each other.
After researching and analyzing the different components, we decided to
select the following devices. For the
microprocessor, the PIC16F877 was selected
The decoder will be the
VS1001K. The SanDisk Multimedia Card
will handle the memory functions. These
are the three major components of the MP3 player. The specifications of each device are described in detail in the
Proposed Approach section of the report.
Feasibility Analysis
An MP3 player is a common electronic device that can be bought in any electronic superstore. MP3 players have been constructed by numerous students at other universities with and without PHD programs in Engineering. There are many ways to develop an MP3 system by using different components for the storage element, decoding component, and central processing unit, which acts as the brain of the device. Presently there is numerous amount of documentation such as pictures of projects, circuit diagrams, and links to helpful information pertaining to MP3 players. After contacting successful groups and professional hobbyists about their projects, we concluded this is not the first MP3 player to be designed by undergraduate Computer Engineers.
Since other Computer Engineers designed successful, working projects it is important to look at the components they used. Our research shows that complexity of the circuit is less tedious with a simple interface with the source mp3 data. The mp3 storage elements used in projects are either a hard disk, cd-rom drive, or some type of flash/multimedia card. These components act as non-volatile sources where MP3 files are properly stored. The research also indicates decoders in the majority of the successful projects were MAS3507D, VS1001K, and STA013. These three decoders are able to perform the digital signaling processing aspect in order to save us valuable time in order to complete the project. The project can be done within a budget of 150 dollars assuming that we use an inexpensive processor. Processors such as the Atmel AT90S8515, PIC16F877 and PIC12C508A-04/P appear to be the least expensive chips that keep us within tolerable budget.
Hard Drive:
From our research, “a hard disk is
part of a unit, often called a "disk drive," "hard drive,"
or “hard disk drive,” that store and provides relatively quick access to large
amounts of data on an electromagnetically charged surface or set of surfaces.
Today's computers typically come with a hard disk that contains several billion
bytes (gigabytes) of storage.
A hard disk is really a set of stacked "disks,"
each of which, like phonograph records, has data recorded electromagnetically
in concentric circles or "tracks" on the disk. A "head"
(something like a phonograph arm but in a relatively fixed position) records
(writes) or reads the information on the tracks. Two heads, one on each side of
a disk, read or write the data as the disk spins. Each read or write operation
requires that data be located, which is an operation called a "seek."
(Data already in a disk cache, however, will be located more quickly.)
A hard disk/drive unit comes with a set rotation speed
varying from 4500 to 7200 rpm. Disk access time is measured in milliseconds.
Although the physical location can be identified with cylinder, track, and
sector locations, these are actually mapped to a logical block address (LBA)
that works with the larger address range on today's hard disks.”[3]
Below are the specifications for the Western Digital Layout Caviar 1.5 Gigabytes[4]
|
Form |
|
3.5"/SLIMLINE |
|
|
|
|
Native
|
Translation |
||
|
Capacity form/uniform |
|
1624/ |
MB |
|
|
Cylinders |
|
3148 |
|
|
|
Seek time av./s. track |
|
11.0/ 3.0 |
ms |
|
|
Heads |
6 |
16 |
|
|
|
Controller |
|
IDE / ATA2 FAST/ENHA |
|
|
|
Sector/track |
|
63 |
|
|
|
Cache/Buffer KB |
|
128 ADAPTIVE |
|
|
|
Precompensation |
|
|||
|
Data transfer rate int. |
|
|
MB/s |
|
|
Landing Zone |
|
|||
|
Transfer ext. DMA2 |
|
16.600
|
MB/s |
|
|
Bytes/Sector |
512 |
|||
|
Recording method |
|
RLL 1/7 |
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
operating
|
non-operating
|
|
Supply voltage |
|
5/12 V |
|
Temperature |
°C |
|
5 / 55 |
-40 / 60 |
|
Power: sleep |
W |
0.5
|
|
Humidity |
% |
|
8 / 80 |
5 / 95 |
|
standby
|
W |
0.5
|
|
Altitude |
Km |
|
-0.305 /
3.048 |
-0.305 /
12.192 |
|
idle
|
W |
4.3
|
|
Shock |
g |
|
10 |
150 |
|
seek
|
W |
|
|
Rotation |
RPM |
|
5200 |
|
|
read/write
|
W |
4.3
|
|
Acoustic |
Dba |
|
37 |
|
|
spin-up
|
W |
11.2
|
|
ECC |
bit |
|
REED
SOLOMON |
|
|
|
|
|
|
MTBF |
h |
|
300000 |
|
|
|
|
|
|
Warranty |
Month |
|
36 |
|
|
Lift/Lock/Park |
|
YES |
|
Certificates |
|
|
CSA,FCC,IEC950,TUV,UL1950
|
|
|
|
|
|
|
|
|
|
|
|

Figure B.3) Specific Pinouts of Western Digital Layout Caviar 1.5 Gigabytes

Pros of using a hard disk:
Cons
CD-ROM Drive:
A CD-ROM stands for Compact Disc, read-only-memory is an adaptation of the CD that is designed to store computer data in the form of text and graphics, as well as hi-fi stereo sound. Although the disc media and the drives of the CD and CD-ROM are, in principle, the same, there is a difference in the way data storage is organized. Two new sectors were defined, Mode 1 for storing computer data and Mode 2 for compressed audio or video/graphic data so we will use mode 2. Mode 2 uses only two layers of error detection and correction, the same as the CD-DA. Therefore, all 2,336 bytes of data behind the sync and header bytes are for user data. Although the sectors of CD-DA, CD-ROM Mode 1 and Mode 2 are the same size, the amount of data that can be stored varies considerably because of the use of sync and header bytes, error correction and detection. The Mode 2 format offers a flexible method for storing graphics and video.
The CD-ROM has Constant Linear Velocity (CLV) is the principle by which data is read from a CD-ROM. This principal states that the read head must interact with the data track at a constant rate, whether it is accessing data from the inner or outermost portions of the disc. This is affected by varying the rotation speed of the disc, from 500 rpm at the center, to 200 rpm at the outside. In a music CD, data is read sequentially, so rotation speed is not an issue. The CD-ROM, on the other hand, must read in random patterns, which necessitates constantly shifting rotation speeds. Pauses in the read function are audible, and some of the faster drives can be quite noisy because of it.[5]
Figure B.4) Acer CD-ROM drive[6]


Acer CD-656A
52x max speed
|
Data Transfer Rate |
8,400 KB/sec max., 33.3 MB/sec (Ultra DMA mode) |
|
Access Time |
90 ms typical |
|
Buffer Size |
128KB |
|
Interface |
E-IDE |
|
Disk Format |
CD-Audio, CD-ROM (mode 1 and mode 2), CD-ROM XA (mode 2, form 2), CD-Plus, CD-i/FMV, Video CD, PhotoCD (single & multi-sessions), I-TRAX Enhanced CD, Karaoke CD, CD-R, CD-RW |
|
Disk Size |
80 mm and 120mm |
|
Power Requirement |
DC 5V?5% 450mA typical, DC 12V?5% 650mA typical |
|
Dimensions |
5.7"(W) x 1.7"(H) x 8.3"(D) |
|
Weight |
2.0 Lbs |
|
Firmware Update |
Flash memory upgrade |
|
Accessories |
1pc
User's guide |

|
Pin No. |
Signal Name |
Pin No. |
Signal Name |
|
1 |
Address Bit 0 |
21 |
Write Enable |
|
2 |
Ground |
22 |
Ground |
|
3 |
Address Bit 1 |
23 |
Bus Enable |
|
4 |
Ground |
24 |
Ground |
|
5 |
Not connected |
25 |
Data Bit 0 |
|
6 |
Ground |
26 |
Ground |
|
7 |
Not connected |
27 |
Data Bit 1 |
|
8 |
Ground |
28 |
Ground |
|
9 |
Not connected |
29 |
Data Bit 2 |
|
10 |
Ground |
30 |
Ground |
|
11 |
Not connected |
31 |
Data Bit 3 |
|
12 |
Ground |
32 |
Ground |
|
13 |
Interrupt |
33 |
Data Bit 4 |
|
14 |
Ground |
34 |
Ground |
|
15 |
Data request For DMA |
35 |
Data Bit 5 |
|
16 |
Ground |
36 |
Ground |
|
17 |
Data Acknowledge For DMA |
37 |
Data Bit 6 |
|
18 |
Ground |
38 |
Ground |
|
19 |
Read Enable |
39 |
Data Bit 7 |
|
20 |
Ground |
40 |
Ground |
Pros
Cons
· Optical interface
· Pin Interfacing with other components
· Two Modes of operation
· Bulky
· Interface complexity
· Not portable (data can be misread or skipped)
Flash devices:
Flash memory (sometimes called
"flash RAM") is a type of constantly-powered nonvolatile memory that
can be erased and reprogrammed in units of memory called blocks. It is a
variation of electrically erasable programmable read-only memory (EEPROM)
which, unlike flash memory, is erased and rewritten at the byte level, which is
slower than flash memory updating. Flash memory is often used to hold control
code such as the basic input/output system (BIOS) in a personal computer. When
BIOS needs to be changed (rewritten), the flash memory can be written to in
block (rather than byte) sizes, making it easy to update. On the other hand,
flash memory is not useful as random access memory (RAM) because RAM needs to
be addressable at the byte (not the block) level.
Flash memory gets its name because the microchip is
organized so that a section of memory cells are erased in a single action or
"flash." The erasure is caused by Fowler-Nordheim tunneling in which
electrons pierce through a thin dielectric material to remove an electronic
charge from a floating gate associated with each memory cell. Intel
offers a form of flash memory that holds two bits (rather than one) in each
memory cell, thus doubling the capacity of memory without a corresponding
increase in price.
Flash memory is used in digital cellular phones, digital
cameras, LAN switches, PC Cards for notebook computers, digital set-up boxes,
embedded controllers, and other devices.[7]

Multimedia
Card
Price $ 24.99
Dimensions: 45.0mm x 37.0mm x
0.76mm
Operating temperature range: 0° C to +55°C
Connector pins: 22
Both cards can perform the same functions; the only difference between the two is the multimedia card uses less pins, making it easier to interface.

Pros
Cons
Decoders:
The MAS 3507D is a single-chip MPEG layer 2/3 audio decoder for use in audio broadcast or memory based playback applications. Due to embedded memories,
the embedded DC/DC up-converter, and the very low power consumption, the MAS 3507D is ideally suited for portable electronics. In MPEG 1 (ISO 11172-3), three hierarchical layers of compression have been standardized. The most sophisticated and complex, layer 3, allows compression rates of approximately 12:1 for mono and stereo signals while still maintaining CD audio quality. Layer 2 (widely used in DVB, ADR, and DAB) achieves a compression of 8:1 providing CD quality. In order to achieve better audio quality at low bit rates (<64 kbit/s per audio channel), three additional sampling frequencies are provided by MPEG 2 (ISO 13818-3). The MAS 3507D decodes both layer 2 and layer 3 bit streams as defined in MPEG 1 and 2.The multichannel/multilingual capabilities defined by MPEG 2 are not supported by the MAS 3507D. An extension to the MPEG 2 layer 3 standard developed by FhG Erlangen, Germany sometimes referenced as MPEG 2.5, for extremely low bit rates at sampling frequencies of 12, 11.025, or 8 kHz is also supported bythe MAS 3507D.
This decoder has 44 pins, below is table that defines the first 8 pins for this decoder.[9]
|
1 6 TE IN VSS Test Enable |
|
2 5 POR IN VDD Reset,
Active Low |
|
3 4 I2CC IN VDD I2C Clock Line |
|
4 3 I2CD IN/OUT VDD I2C Data Line |
|
5 2 VDD SUPPLY X Positive
Supply for Digital Parts |
|
6 1 VSS SUPPLY X Ground
Supply for Digital Parts |
|
7 44 DCEN IN X Enable
DC/DC Converter or Voltage Supervision |
|
8 43 EOD OUT LV PIO End of
DMA, Active Low |
VS1001k
is a single-chip solution for an MPEG layer 1, 2 and 3 audio decoder. The chip
contains a high-performance low-power DSP processor core (VS DSP), working
memory, 4 kBytes of program RAM and 0.5 kBytes of data RAM for user
applications, serial control and input data interfaces, and a high-quality
oversampling variable sample-rate stereo DAC, followed by an earphone amplifier
and a ground buffer. VS1001k receives
its input bit stream through a serial
input bus, which it listens to as a system slave. The input stream is decoded
and passed through an analog/digital hybrid volume control to an 18-bit
oversampling, multi-bit, sigma-delta DAC. The decoding is controlled via a
serial control bus. In addition to the basic decoding, it is possible to add
application specific features, like DSP effects, to the user RAM memory. This decoder has 28 pins.[10]
|
DREQ 1 DO data request,
input bus |
TEST0 15 DI reserved for
test, connect to DVDD |
|
DCLK 2 DIO serial input data
bus clock |
TEST1 16 DIO reserved for
test, do NOT connect! |
|
SDATA 3 DI serial data input |
TEST2 17 DIO reserved for
test, do NOT connect! |
|
BSYNC 4 DI byte
synchronization signal |
AGND1 18 PWR analog ground |
|
DVDD1 5 PWR digital power
supply |
AVDD1 19 PWR analog power
supply |
|
DGND1 6 PWR digital ground |
RIGHT 20 AO right channel
output |
|
XTALO 7 CLK crystal output |
AGND2 21 PWR analog ground |
|
XTALI 8 CLK crystal input |
RCAP 22 AIO capacitance for
reference |
|
DVDD2 9 PWR digital power
supply |
AVDD2 23 PWR analog power
supply |
|
DGND2 10 PWR digital ground |
LEFT 24 AO left channel
output |
|
|